Memory arrays are comprised of individual bitcells whose outputs are used to electrically represent logical 1's and 0's. The bitcells are typically made up of CMOS transistor circuits whose outputs can be made to be at some specific voltage value which corresponds to a logical 1 or 0. Memory arrays also include write driver circuits which provide the input signals to the bitcells in order to store the output required for a logical 1 or 0.
CMOS transistors are known to conduct only negligible leakage current when in a non biased steady-state or non-transient condition of operation, but can cause substantial current flow from a power supply under transient switching conditions when used in complementary pairs. The bitcells and write drivers in a memory array utilize CMOS transistors in complementary pairs to achieve the two output voltage levels that correspond to a logical 1 or 0.
The write driver circuits of the memory array provide an input signal to numerous bitcells simultaneously during a memory write cycle. This causes substantial current flow through the power supply network due to the simultaneous switching, or transient condition, of both the write drivers and the bitcells. This transient current flow or current spike in the power supply network results in a transient voltage being induced in the various circuit paths which is proportional to the inductance of the circuit path and the rate of change of the transient current with respect to time or, V=L*(di/dt). This transient voltage typically appears on the power supply return paths and is commonly referred to as "ground bounce."
It is possible for the transient voltage in the power supply network to be of such a magnitude that circuits attached to the network may change logic state in reaction to this voltage, resulting in a functional failure of the electronic system. The current spike must therefore be eliminated or reduced to an acceptable level in order for the electronic system to function as required.